Towards Ideal Arbiter PUF Design on Xilinx FPGA: A Practitioner's Perspective | Semantic Scholar
Artix FPGA Target Board (CW305) - NewAE Technology | Mouser
FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures - ScienceDirect
A Design of Ring Oscillator Based PUF on FPGA | Semantic Scholar
How to exploit the uniqueness of FPGA silicon for security applications - EETimes
Figure 2 from FPGA PUF using programmable delay lines | Semantic Scholar
PolarFire™ Non-Volatile FPGA Family Delivers Ground Breaking Value: Best-In-Class Security « Microsemi
Kit for getting started with secure FPGA design
A PUF-FSM Binding Scheme for FPGA IP PROTECTION
A comparison of PUF cores suitable for FPGA devices
Intrinsic ID Announces Embedded SRAM PUF Security IP for Military-Grade IP protection in Intel FPGAs
Apollo - Intrinsic ID | Home of PUF Technology
GitHub - oliver132/FPGA-PUF: FPGA VHDL implementation of a Physical Unclonable Function
FPGA based delay PUF implementation for security applications | Semantic Scholar
Novel hybrid strong and weak PUF design based on FPGA
A New Arbiter PUF for Enhancing Unpredictability on FPGA
Schematic representation of a single Butterfly PUF cell on an FPGA | Download Scientific Diagram
FPGA layout of the entire LPN-based PUF implementation. Four main... | Download Scientific Diagram
Microsemi builds PUF into PolarFire FPGAs
A secure and area-efficient FPGA-based SR-Latch PUF | Semantic Scholar
PDF) FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures
Cryptography | Free Full-Text | A Novel Ultra-Compact FPGA PUF: The DD-PUF
